CMPUT 329

Lab #4

Scrolling Message Display

(2 weeks)

This is an INDIVIDUAL lab. You must complete it by yourself.

Overview

This exercise creates a scrolling message display using the two 7-segment LEDs on the XStend board. The message is loaded into the off-chip RAM at address 0 using the GXSLOAD utility at the same time as your .bit file is loaded. The contents loaded are a sequence of ASCII codes representing the message to be displayed.

You are provided with a partial design that you must complete to produce a basic scrolling functionality. You must then extend this design to add other features to the scrolling message display.

Background

To scroll a message through a display, we must display the letters for a certain amount of time before shifting a new letter into the display. Because we are using the 50 MHz board clock, we need a control unit to divide this frequency and, hence, make the message visible.

One might ask why not simply reduce the clock speed? In the design of this board the LED lines that activate the display are shared with most RAM addressing lines on the XSA-50 board. Thus reducing the clock speed is not an option because we would also be reducing the speed of the memory accesses. Sharing wiring resources is a common practice in digital designs to maximize space usage. If you read the board references on the lab page (XSA-50), you will notice this sharing. As the manuals show, pins are often connected to two or three components, rather than the expected single connection. A well known example of signal sharing is the shared PCI and ISA buses in modern computer systems.

Since sharing is commonplace, there is naturally a standard technique to implement it: multiplexing. Multiplexing involves dividing some shared resources into parts that are distributed among the parties sharing the resource. A common example, Frequency Division Multiplexing or FDM, involves dividing available carrier (i.e. air, optical cable, etc.) frequencies into discrete intervals. FDM is the principle that allows multiple radio stations to broadcast in the same area, multiple TV stations to be sent over a single cable line.

Our solution to the RAM/LED sharing problem involves a different kind of multiplexing: Time Division Multiplexing. The RAM address will be sent over the shared lines for a certain amount of time, the LED output for the rest of the time. Of course, we can ignore the RAM output when the LED information is sent, but the LEDs cannot "stop listening" to the RAM address. Fortunately, the human eye has a slow response time. Thus if we send a different data to the LED for a brief interval of time, this data will not be perceptible by the human eye in the LED output.

Thus, we will use a few clock cycles (at 50 MHz) to perform the RAM accesses and a large number of clocks to output to the LEDs. To put it in perspective, at 50 MHz,a 100 clock cycles lasts for 2 µs. In contrast, the human eye can detect changes at less than 100 Hz (usually quoted at 24 fps or 24 Hz), which means any change that lasts less than 41 000 µs are undetectable. Because we only need a few clock cycles to access the RAM, we can send the memory addresses simultaneously to the memory and to the LED, and no one will notice. To accomplish this balance, we will use a 25 000 000 iteration cycle. This cycle length will display the letters for very nearly 1/2 second. If this cycle is made longer, the letters will be displayed for a longer period.

Thus the scrolling display algorithm is an infinite loop that repeats the following steps:
  1. Access the RAM to obtain a new character,
  2. Thansfer the character currently in the right LED to the left LED.
  3. Place the new character in the right LED.
  4. Increment the RAM address counter.
  5. Wait until it is time to get a new character.
The amount of wait between characters determines the speed at which the message will scroll in the display.

Prelab:

  1. Read the lab assignment. Read the GXSLOAD sections related to using RAM. Read pages 854 - 858 (sections 10.2 - first half of 10.3.3) in Wakerly.
  2. Look at the specifications of the components that you are given and think about how they must be connected and how they work together. Draw out a schematic connecting the components so that you can have a better idea of how the circuit works (and, more importantly, how to modify it when necessary).
  3. Read the VHDL code for the control unit (see the resources section below). Think about how to complete it. You may want to start filling in the missing sections of code before coming to the lab. Note that, as provided, these VHDL files should synthesize, but because there is no functional code in them, they won't do anything.

Lab:

You first task is, given the control, line-selection and ASCII/LED conversion modules, to connect the modules in structural VHDL and complete the code within them. Your goal at this point is to create a working scrolling message display. The way this message should be displayed is as if the two LEDs form a window over a horizontal scroll of paper. The window moves left to right along the paper showing two characters at a time.

The remaining tasks are designed completely independently by you. To this point, presumably, you have designed a working scrolling message display which reads RAM contents and displays them on the XStend board LEDs. We, however, have higher expectations about your digital design skills. With this in mind, we challenge you to add the following behaviours to your design:
 You may add these functionalities in any manner that you wish. Two methods immediately come to mind: either modify the existing components to facilitate the changes, or add modules that will interact with existing modules to accomplish this task. In either case, we expect that you make sound, well-documented design decisions.

Notes about RAM:

In order to use the RAM, you need to assert the chip select (CEB) line to enable the RAM and the output enable (OEB) to make the RAM output its data. Remember that these signals are active-low. For this lab, since we only read from the RAM, you can assert these signals without control (ie. constant value). For more complicated designs involving memory, you must logically control the OEB as well as the write enable (WEB) lines. Also, the addressing lines do not correspond directly to LED lines for the XSA-50. You must keep this in mind when writing the constraints file and designing the line selection unit for the XSA-50.

(Updated 25/10/03)

There are also a couple of other quirks about the Flash RAM. First of all, there is a flash reset line from FPGA. By default with implementation tools, unassigned lines are set to '0'. The problem here is that the flash reset is active-low, meaning that the default condition for the flash is that it will always be reset. Tying this line (p59) to the pushbutton reset should deal with this problem.

Secondly, there is a minor timing issue with the Flash memory. It does not appear to respond to a new address within one cycle of the 50 Mhz clock. Thus, in your clock division, there are several cycles devoted to a hold time for the address, waiting for the RAM to respond between supplying the address to the RAM and reading the data from the RAM

Finally, with respect to loading the messages into the RAM. To load the hex files, they must be dragged-and-dropped into the Flash/EEPROM box of GXSLoad. That being said, once you have loaded it, you do not need to reload it when loading a new version of your design. This will no doubt save you much time, as loading to the flash requires several steps in the loading process.

 Notes about the LED: (Updated 25/10/03)

One very important thing to keep in mind is that the output lines DO NOT correspond directly to the RAM addressing lines. This is reflected in the line selection unit and the (**incomplete) constraints file we are providing you, but you must keep it in mind when you are writing your overall structural description of the design.

Deliverables:

You must submit all VHDL code relating to your design as well as your constraints file in a zipped file called 'lab4.zip'.

Resources:

Grading:

Miscellaneous

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Created by Paul Berube , 2001; Modified by Paras Mehta, 2003.