PPT Slide
arith_result
logic_result
inputA
inputB
output
result
result
operation
operandA
operandB
Logic Module
Arithmetic Module
operation
operandA
operandB
signal arith_result : std_logic_vector(7 downto 0);
signal logic_result : std_logic_vector(7 downto 0);
MUX
selection
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