CMPUT 605-FPGA  ADVANCED TOPICS IN COMPUTER ARCHITECTURE Department of Computing Science  University of Alberta

Fall 2018

TIME: Twice weekly: day/time TBD
INSTRUCTOR: José Nelson Amaral
 

Calendar Description:   Study advanced topics in computer architecture such as the design of accelerators, including Graphics Processing Units (GPUs) and Tensor Processing Units (TPUs) and other architectures targetting deep learning. Study the implication of speculative execution in security with the creation of side channels that may leak information, study the impact of persistent memory on architecture design, data compression for caches, choices for the design of datacentre architectures. Advanced topis in virtual memory management and in architectural support for virtualization.

Course Description and Goals:

This course will cover current issues in advanced computer architecture as listed above. The format will be the one of a reading course with two weekly meetings to guide and direct the reading. The semester will be divided into four periods with one main theme studied in each period. The current plan for these main themes is: (1) Accelerators; (2) Memory Systems and Data Compression; (3) Speculative Execution and Security; (4) Data Centre Architecture and Virtualization.

For each theme we will start with a collection and summarization of most important papers published in top conferencences and magazines, including the International Conference on Computer Architecture (ISCA), the International Symposium on Microarchitecture (MICRO), the International Symposium on Memory Management (ISMM), IEEE Micro, the IBM System Journal, and the IEEE Computer Architecture Letters.

Class meetings will have the format of a round-table discussion. A student may be assigned to be responsible for a specific paper, however presentation-style meetings with one active speaker and passive listeners will be avoided. All students will be responsible for lightly reviewing each paper, with the one student responsible for the paper leading the discussion. All other students are required to come with important questions about the material. Followup research based on a discussion is likely to be assigned in class.

Grading:

Class Presentations and discussions        50%
Homeworks                                             20%
Final Course Report                                 30%

Course Work and Evaluation Framework:

Homework #1                                             September 28
Homework #2                                             October 05
Class Presentations                                    October 15-23
Homework #3                                             November 02
Homework #4                                             November 09
Class Presentations                                 November 19-27
Final Course Report                                 December 07

Course Plan:

• September 06 - September 28:
  Accelerators, GPU architecture for multi-GPU high-performance computing, accelerators with consistent memory, tensor processing units, computational requirements for deep learning.
• October 01 - October 26:
  Data centre architecture, power consumption minimization, throughput computation, large memory systems, support for virtualization.
  
• October 29 - November 26:
  Advances in Memory Architecture, Data compression for caches, persistent memory, advances in memory hierarchy design.
  
• November 28 - December 07:
  Speculative execution and the security threat of side channels.
  

Sample Reading Material:

• Meltdown, Moritz Lipp, Michael Schwarz, Daniel Gruss, Thomas Prescher, Werner Haas, Stefan Mangard, Paul Kocher, Daniel Genkin, Yuval Yarom, Mike Hamburg.
• Spectre Attacks: Exploiting Speculative Execution, Paul Kocher, Daniel Genkin, Daniel Gruss, Werner Haas, Mike Hamburg, Moritz Lipp, Stefan Mangard, Thomas Prescher, Michael Schwarz, Yuval Yarom.
• Demystifying Parallel and Distributed Deep Learning: An In-Depth Concurrency Analysis, TAL BEN-NUN and TORSTEN HOEFLER
• Base-delta-immediate compression: practical data compression for on-chip caches Gennady Pekhimenko, Vivek Seshadri, Onur Mutlu, Phillip B. Gibbons, Michael A. Kozuch, Todd C. Mowry
• In-Datacenter Performance Analysis of a Tensor Processing Unit, N. P. Joupii et al, ISCA, 2017.
• Efficiently scaling out-of-order cores for simultaneous multithreading, Faissal M. Sleiman, Thomas F. Wenisch, ISCA 2016.
• Data reorganization in memory using 3D-stacked DRAM, Berkin Akin, Franz Franchetti, James C. Hoe, ISCA 2015.

University of Alberta

Computing Science