CMPUT329 - Fall 2003
Reading Assignment
Encoders vs. Decoders
Binary encoders
Need priority in most applications
8-input priority encoder
Priority-encoder logic equations
74x148 8-input priority encoder
74x148 Circuit
74x148 Truth Table
Cascading Priority Encoders
Three-state buffers
Different flavors
A Three-State Party Line
Timing considerations
Hysteresis: Schmitt-Trigger Inverter
Immunity to Noise
Three-state drivers
Driver application
Three-state Transceiver
Transceiver Application
Three-State in VHDL and STD_ULOGIC
IEEE 1164 Declarations for STD_ULOGIC, STD_LOGIC
IEEE 1164 package body STD_ULOGIC, STD_LOGIC
Strenght Precedence Rules
Three-State Drivers in VHDL
Three-State Drivers in VHDL (cont.)
2-input XOR gates
XOR and XNOR symbols
Gate-level XOR circuits
Multi-input XOR
Parity tree
Equality Comparators
Iterative Combinatorial Circuit
Iterative Comparator Circuit
8-bit Magnitude Comparator
Adders
Full-adder circuit
Ripple adder
Ripple Adders: Time?Complexity
Propagate and Generate
Carry Equations
74x283 4-bit adder
PPT Slide
Ripple carry between groups
Lookahead carry between groups
Subtraction
Full subtractor = full adder, almost
Email: amaral@cs.ualberta.ca
Home Page: www.cs.ualberta.ca/courses/329
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