CMPUT329 - Fall 2003
Reading
Documentation Standards
Block Diagram
Schematic diagrams
Example schematic
Flat Schematic Structure
Hierarchical Schematic Structure
Other Documentation
Gate symbols
DeMorgan Equivalent Symbols
Viewing Gates in Positive or Negative Logic
Logic Functions: Boolean Algebra
Signal Names and Active Levels
Examples of Buses
Timing Diagrams
Bus Timing Diagram
Multiplexers
A typical use of a MUX in a processor control path
A 4-to-1 MUX can implem. any 3-variable function
Decoders
Binary 2-to-4 decoder
2-to-4-decoder logic diagram
Negative Logic 2-to-4 Decoder
Decoder Symbol
Complete 74x139 Decoder
More decoder symbols
3-to-8 decoder
74x138 3-to-8-decoder symbol
Decoder Cascading
More Cascading
Decoder applications
Programmable Logic Arrays (PLAs)
Programmable Logic Array Structure
Internal Structure of a PLA
Example: 4x3 PLA, 6 product terms
Compact Representation
PLA Electrical Design
Programmable Array Logic (PALs)
Programmable Array Logic (PAL)
PPT Slide
Designing with PALs
Some Questions
Email: amaral@cs.ualberta.ca
Home Page: www.cs.ualberta.ca/courses/329
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