Re: a question on lab #6 (fwd)

From: Jose Nelson Amaral (amaral@cs.ualberta.ca)
Date: Wed Nov 21 2001 - 15:48:07 MST


---------- Forwarded message ----------
Date: Wed, 21 Nov 2001 15:41:01 -0700 (MST)
From: Paul Berube <berube@ugrad.cs.ualberta.ca>
To: Jose Nelson Amaral <amaral@cs.ualberta.ca>
Cc: jeanfran@cs.ualberta.ca
Subject: Re: a question on lab #6

On Wed, 21 Nov 2001, Jose Nelson Amaral wrote:

>
>Jean Francois Lord is here in my office asking about the following step
>on lab 6:
>
>"Record" notes from the source RAM partition to the destination RAM
>partition (only when in RECORD mode)
>
>I don't remember how the RAMs are connected in this board.
>
>Could you explain how we do this "copy" operation from one
>area of the RAM to another.

the msb of the address is used to partition the RAM in two - source (msb =
0) and dest (msb = 1). (source is "read only")

first, you read a byte from the source section, hold on to this value,
change to the correct address in the destination, and write the byte.
As in lab 4 where multiple devices were on the same bus, you need to have
a clock that is faster than "normal" so that you can preform multiple
operations (access LEDs, read, write) during one "normal" cycle. and of
course, since you need to be able to read the leds, access to the ram
should only be a small fraction of total clocks.

>
>Essentially what I am curious about is if the source and
>destination addresses need to be in separate RAM chips?
>

There is only one chip, but we partition it using the msb of the address.

>Can you issue a read and write to the same chip (my
>guess, without looking at the board's details is that
>you can't).

no, the read and write must be done seperately (no overlap).

>
>Do you want then to control the read and write into two
>separate clock cycles? In this case where the value is
>stored in the meantime?
>

yes, they will need several clock to do all the ram access. between the
read and the write, the value should be stored in a buffer in some sort of
control unit (that is probably also taking care of selecting the correct
address and LED output), just like the LED output from lab 4.

One more thing I think I should mention: the source and dest have
seperate address counters. Reset will reset the currently active section,
global reset will reset both. I thought I had made this clear in the lab,
but it looks like i made the rest of the changes, but missed this one...
it will be fixed in a matter of minutes. I will also send out a message
to this effect.

> Cheers,
>
> Nelson
>
> /
> \ / / Jose Nelson Amaral - amaral@cs.ualberta.ca
> ) / ( Associate Professor
> / / \ Dept. of Computing Science - University of Alberta
> ( / ) Edmonton, Alberta, Canada, T6G 2E8
> \ O / Phone: (780)492-5411 Fax: (780)492-1071
> \ / http://www.cs.ualberta.ca/~amaral
> `----'
>
>
>
>

  "Oh, there it is...
      ...Then what the heck was that other piece of code we changed?"



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