On Fri, 19 Oct 2001, Wilson Kwan wrote:
>
> Hello,
>
> I was just wondering, if you have a circuit and a signal passes through an
> inverter, is that time pretty much negligable?
>
> i.e.)
> Would it be fair to say that, if you have 2 different paths that a signal
> must pass through, 1 path goes straight to an intended destination (for
> all intensive purposes, we do not care about the destination), and the
> other must go through an inverter before reaching the destination -->
> the path that passed through the inverter reaches the destination at
> almost the same time the other?
The times for an invertor are given on page 334, Table 5-2. The 74x04
is a collection of six inverters (You can look at the datasheets for
all the devices in the 74 family listed in Tables 5-2 and 5-3 at the
Fairchild website: http://www.fairchildsemi.com/products/logic). The
timings given in that table
are for the delays of a single inverter. If you compare, you will
see that, for discrete logic, an inverter has pretty much the same
delay as an AND or an OR.
>
> The reason as to why I am confused is because for dynamic hazards, we were
> told that inverters are pretty much negligable in regards to time (but
> still play a small role),
In some technology, inversion might come "for free" because in every
gate you can get either the signal or its inversion, and thus in those
technologies there is no cost for an inverter. However you always have
to verify it the packaging with the signals that you need are available.
> however, earlier in the year you stated that one
> could invert a signal twice (double negation) to delay a propogating
> signal for "timing's" sake...
you always have to think about what technology you are using, I was
refering to discrete logic, such as the 74x family. And remember that
I said that this is not always a good idea.
Another use of the delay of an inversor is on the implementation of
the simplest latch that we studied in Topic9. If the inversors had
zero delay, that circuit would not generate an oscilating signal.
Cheers,
Nelson
/
\ / / Jose Nelson Amaral - amaral@cs.ualberta.ca
) / ( Associate Professor
/ / \ Dept. of Computing Science - University of Alberta
( / ) Edmonton, Alberta, Canada, T6G 2E8
\ O / Phone: (780)492-5411 Fax: (780)492-1071
\ / http://www.cs.ualberta.ca/~amaral
`----'
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