the "rom" is just a logical ROM, since obviously we can't have a real ROM
inside the FPGA.
What you want to do is write a vhld module that will act like a ROM. The
contents are given in the first table in the assignment just below step 2
it the encryption process (address(0:1) -> output(0:3)). So that I don't
totally give this away, let me just ask you this: If you were writing
this in code (vhdl, or, say C, like treehouse.c), what kind of language
construct would you use to give a differnt 4 bit value from all possible 2
bit values? That's what you should use here.
Note that it is not necessary to package the ROM as a seperate vhdl
module. However, I think that this could lead to a less-complex design
and make things easier for you...
hope that helps. if you have any other concerns, please let me know!
--Paul
On Mon, 8 Oct 2001, Jose Nelson Amaral wrote:
>
>
>---------- Forwarded message ----------
>Date: Mon, 8 Oct 2001 13:16:00 -0600
>From: Jean-Francois Lord <lordall@telusplanet.net>
>To: amaral@cs.ualberta.ca
>Subject: Lab3?
>
>Hi,
>
> Just two questions about lab3... In the lab handout there is reference
>to reading from ROM in the encryption/decryption module.
>
>"XOR original bits with ROM contents"
>
>Where can I find information about setting data in ROM and then reading it?
>
>When performing the final permutation, we need to make use of a variable
>that is set depending on past events, i.e: which permutation to perform. How
>is this done?
>
>Thanks
>J-F L
>
>P.S.
>I was wondering if you know if they will fix that lab machines so that you
>do not have to set the license every time you want to check the syntax.
>
"Oh, there it is...
...Then what the heck was that other piece of code we changed?"
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