Space Management
Due to the large size of Xilinx Foundation projects, you probably
will not be able to keep more than your active project in it's
complete form without exceeding your disk quota. (Projects can be
as 7 MB or larger!!)
The data saved when a project is implemented is quite large
(several MB). Thus, you may want to go to the "versions" tab in
the project manager and delete any versions of the project listed
there before logging out (or check your quota first, to be sure
your are not over).
Also, you should at least zip your old projects - a 7+MB project
can zip down to 1.5MB. However, it is not necessary to keep all
the file for a project. You can easily re-constitute the whole
thing if you keep these files (I recommend zipping them into an
archive, using the name of the project so that you remember
it):
- *.vhd - your VHDL files
- *.ucf - your constraints file (for pin assignments)
- *.sch - your schematic file (for lab 1 only)
To recreate your project, start a new project with the same name
as the old one (you need to delete the old project directory (but
not the files listed above!!!), so Foundation can make the "new"
directory). Now, copy all the above files into the new project
directory. Since you are simply working with VHDL for
most of these labs (except Lab 1, where you are using a simple
schematic, but that will work the same), you can simply
re-synthesize your files.
PS: if you forgot the original name of the project, or want to
change it, just make sure you follow these guidelines (proj
denotes your project name):
- the ucf file should be called proj.ucf
- the directory that the project is in is called .../proj
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